Re: [stella] #of gates in TIA chip

Subject: Re: [stella] #of gates in TIA chip
From: Chris Wilkson - MCD <cwilkson@xxxxxxxxxxxxx>
Date: Wed, 7 Jan 1998 13:50:12 -0800 (PST)
> On Tue, 6 Jan 1998, Frank Palazzolo wrote:
> > Just out of curiousity - since you mentioned the chip-plots
> > for the TIA, did you ever run across the schematics for the 
> > TIA?  Besides being interesting to look at, it would:
> 
> I really don't know the difference between a chip plot and a schematic.
> There was lots of that sort of thing at the documentary, although the
> schematics were probably just for the prototypes.  I just don't
> know how one would reduce these large sheets down to something useful.

A schematic is a blueprint for a chip, using symbols to represent various
circuit elements.  A chip plot is a *photo* of the actual silicon.

Think of it that way...

-Chris


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