Subject: Re: [stella] some more optimization tips From: "Andrew Davie" <adavie@xxxxxxxxxxxxxxxxx> Date: Sat, 9 May 1998 11:27:35 +1000 |
>Well, you can't use those two when the stack is pointing at one of the TIA >registers, as is done in some kernels. My usual compact delay is INC >zeropage - two bytes for five cycles. Trying to figure what advantage there is to pointing the stack at the TIA? Sure you get a single byte code-size write capability (at the cost of the stack pointer stave/restore, wrapping your accesses to the TIA, and an index register or variable to store the stack pointer). Sure, you can do your writes with a PHA (3 cycles, 1 byte) But... how does it improve on a STA register? (3 cycles, 2 bytes) You gotta be real short of space and do a lot of register writes for this to make an improvement... or am I missing something? A -- Archives (includes files) at http://www.biglist.com/lists/stella/archives/ Unsub & more at http://www.biglist.com/lists/stella/stella.html
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