--------
I dunno why, but my origianl replies to this thread didn't get through.
So I'll jump into the middle again...with somewhat abbreviated answers
this time...
[borrowing burger's reply from the Stella Archive]
> >What would happen if you had 2 ROM chips selected
> >(by design) at the same time on a data bus?
> >
> You would use a LOT of power.
Yep.
> >Is there risk of damaging any chips on the bus?
> >
> Yes, not immediately, but over time the heat damage to the chip trying to
> drive the bus
> high (Logic 1) would shorten the life of the ROM by a lot.
Yep. Not only the heat involved, but the currents. They can cause electro-
migration of metal lines, and can actually destroy crystal lattices in the
devices.
> >What data byte would the CPU get if the data from
> >chip1 is $00 and chip2 is $FF?
> >
> You'd get a 0. You see the 5 volts from the FF would be grounded and all the
> current
> would be drained by the chip giving the logic 0. In most cases this results
> in a logical "AND"
>
> Hence 0xFF AND 0x00 will equal 0x00
Not necessarily. While this could be true for TTL output buffers, it might
not. It depends on the size of the pullup resistors vs. the current sinking
capability of the pulldown devices. For CMOS drivers, they'll fight it out
until one them gives up (permanently). Actually, good TTL outputs will be
complementary too. So they'll behave similar to the CMOS parts.
You basically have 3 possibilities, evaluated on a bit-by-bit basis:
1) Chip 1 wins: you get a valid zero.
2) Chip 2 wins: you get a valid one.
3) They just duke it out until one or both of them gives up the fight
(and eventually, the ghost...it will die permanently.)
For well designed, well matched parts, you'll get case 3 - always.
So you could have 0x00 or 0xff or 0x69. Or you could have an indeterminate
value (case 3) in which case the part that is reading the bus will have to
arbitrate.
The bottom line is DON'T DO IT.
[actually replying to this message]
>>Again, what if for only a few bytes?
>>
>If this drain is only occuring for about 20 cycles on power up and nothing
>more, the drain is not worth worrying about.
For power concerns, yes. But you're still gonna destroy the chip(s).
>>Is there anything that can be added to help the situation?
>
>Don't enable two roms at the same time. Either isolate the second rom and
>add extra decoding logic to disable it when you new rom is to override. This
>is how the GameShark and other like products work to "Patch" video games.
Yes. Don't enable them at the same time. The simple, hack way to do this
is to put an inverter between the 2 enable lines. But note that due to
propagation delays, this still allows a few nanoseconds of overlap.
This is generally assumed to be "ok" for standard logic gates, but it's not
good practice. For an EPROM for instance, it's not impossible to have 100ns
of overlap due to enable-to-output delays (can't remember the JEDEC name for
this spec offhand). If you really want to do it right though, build falling
edge delays (assuming negative enable) into your enable paths so that they
can NEVER be enabled at the same time. This is relatively simple to do.
Or have 2 separate enable lines (better).
>>"most cases" - Other than building something, is there
>>any way to be sure?
>>
>When you are dealing with driving the bus with two buffers, a no no, bad
>things happen and things can get unpredictable.
Exactly. Given two "identical" parts, you can't predict what the behavior
will be. And it gets worse. Given the same 2 parts, the behavior will
actually change over time due to the damage you've caused to one or both parts.
>>I assume this isn't "wired-and" since ROMs aren't open collector?
>>
>It's an AND since ground tends to override an output driving the line high.
Again, this is true only for very simple resistor pullup type output drivers.
It's getting pretty hard to find something like that. And ANYTHING that's
designed to drive a bus at a reasonable speed will have some type of active
pullup because a resistor just can't do it.
>>And I assume pull-up resistors aren't necessary for logical "AND"?
>
>No, pull up are only used for open collector outputs since the output is
>either shorting the line to ground to an open circuit, the pull up resistor
>will then drive the line high via the connection to 5 volts. So if two open
>collector lines are tied together, either one can drive the circuit to
>ground and therefore generate a logical AND.
Yes.
-Chris
PS. I'm right in the middle of final exams week. If anything I've written
here is unclear, please ask questions. I'm not even sure I'm writing in
English anymore (that's my only language, but still I'm not sure ;)
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