> > checkout US patent #US4644495 on the IBM Patent server.
> >
> > www.patents.ibm.com
This is for anyone who has also gone in depth on the pitfall II chip via
David Cranes patent. It is kinda high level, and possibly uncharted
territory(is this correct?). I ask a lot of questions because I am trying
to figure out how pitfallII works, and am looking for other peoples
opinions on some of the technical matters. Is there anyone else out there
who is interested in exploring in depth how pitfallII works?
Regarding music mode, does anyone know what clocking method was used in
the final implementation of pitfall II? The music mode data fetchers are
quite versitile, and I am asking what was used for the OSC/CLK D-FF.
Here's what I am taking for pitfall II usage of the music facilities and
how they function:
The jist is that the three music mode data fetchers, DF5,6,7, are all in
music mode. In this mode, the top and bottom registers are setup to do a
different frequency for each of the three channels. the program then
turns on the music mode in each of the channels when it wants that note to
be played. Internally to the chip, the three signals are added, and the
result is read every scan line(including those lines when nothing is being
displayed) and put into a volume register. Effectively then, the chip is
generating the sound internally, and the computer program is then sampling
it(once per line) by reading the current value, and then re-outputing it
via the atari's music circuitry. Kinda wierd because the process is sorta
re-sampling the sound. In anycase, the three channels would then be run
off of the OSC input, allowing the three channels to run independantly.
However, the above is only a possible method. The patent suggests that
this is the intended method, but the chip was created for more than just
pitfallII, so I am hence wondering if this method was actually the one
used in pitfallII. If so, where is the oscillator? If they used N-MOS,
then I guess they could have implemented a capacitor on the chip, but
that's a lot of space to deticate to a capacitor. I checked inside my
cart, and there is no extra capacitor, just a 560k resistor and a diode.
Now I don't know all that much about N MOS, but iirc, it doesn't seem like
they could have created a large enough cap to work with a 560k resistor to
generate 42khz. I guess they could have generated a higher freq, then
divided it down though. Does anyone know a reasonable high value limit
for a cap in N MOS? Chris?
I find it hard to believe they used the CLK mode because then they would
have to do an extra read(reading the 'indexed data'), just to keep the
frequency going. If this was the case, then the frequencies they could
use would also have to be fractions of the read rate(probably no more than
15khz).
In anycase, does anyone know if they used the OSC selection, and where the
42khz comes from?
Also, does anyone know, do they update the volume register every line, and
if they do, how do they handle making sure it is every line during the
overscan and vertical blanking? What do they do, cycle count the entire
program?
Mark
BTW
If I'm not mistaken, the pitfallII chip is capable of 4 channel sound, not
just three. The onboard sound generaters, when sampled into one of the
atari's volume registers creates three, leaving one of the atari's sound
channels free. (Anyone know how pitfallII divided up the three channels
it uses into these 4?)
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