I lost the instructions about programming. The first three chips in the
BASE.PCX file are 74374:
74374
8-bit 3-state D flip-flop.
+---+--+---+ +---+---+---+---+
/OE |1 +--+ 20| VCC |/OE|CLK| D | Q | 0 : logic low level
Q1 |2 19| Q8 +---+---+---+---+ 1 : logic high level
D1 |3 18| D8 | 1 | X | X | Z | X : don't care, either 0 or
1
D2 |4 17| D7 | 0 | / | 0 | 0 | Z : high impedance
Q2 |5 74 16| Q7 | 0 | / | 1 | 1 | / : rising clock input
Q3 |6 374 15| Q6 | 0 |!/ | X | - | !/ : not a rising edge
D3 |7 14| D6 +---+---+---+---+ - : no change
D4 |8 13| D5
Q4 |9 12| Q5
GND |10 11| CLK
+----------+
The last one is 74157:
74157
4-of-8 noninverting decoder/demultiplexer.
+---+--+---+
S |1 +--+ 16| VCC
1A0 |2 15| /EN
1A1 |3 14| 4A0 S = 0: xY <- xA0
1Y |4 74 13| 4A1 S = 1: xY <- xA1
2A0 |5 157 12| 4Y
2A1 |6 11| 3A0
2Y |7 10| 3A1
GND |8 9| 3Y
+----------+
The first '374 stores the lower address (A0-A5 -> DP0-DP5), the A12 address
line (DP6) and a SEL line (DP7). This SEL line will select the two nibbles
of the data to be read from the cart (0 -> D0-D3 / 1 -> D4-D7) througt the
Status Register from Parallel Port.
The second '374 stores the upper address (A6-A11 -> DP0-DP5), the WRITE
control (DP6) of the Cart and the OE control (DP7) of the third '374.
The third '374 stores the data to be written to the Cart.
The '374s are controled by the AUTO, STROBE and INIT lines of the Parallel
Port. The sequences to write anr read the cart are:
-WRITE:
Send data to Parallel Port Data Register (378h or 3BCh)
Clock (0 -> 1 -> 0) the INIT line
Send lower address to Parallel Port Data Register, A12(0)* and SEL(X)
Clock (0 -> 1 -> 0) the AUTO line
Send upper address to Parallel Port Data Register, WRITE(1) and OE(0)
Clock (0 -> 1 -> 0) the STROBE line
Send upper address to Parallel Port Data Register, WRITE(0) and OE(1)
Clock (0 -> 1 -> 0) the STROBE line
-READ:
Send lower address to Parallel Port Data Register, A12(0)* and SEL(0)
Clock (0 -> 1 -> 0) the AUTO line
Send upper address to Parallel Port Data Register, WRITE(0) and OE(1)
Clock (0 -> 1 -> 0) the STROBE line
Read Parallel Port Status Register (379H or 3BDh) (lower data)
Send lower address to Parallel Port Data Register, A12(0)* and SEL(1)
Clock (0 -> 1 -> 0) the AUTO line
Read Parallel Port Status Register (379H or 3BDh) (upper data)
*The A12 line enables download two games to the cart. The game will be
selected by the G.Sel switch in the 4KCART.PCX file.
Any 8kx8 SRAM can be used, like 5564 and 6264.
> Good schematics, but what are the chips in the base unit? What software do
I
> need to drive it? Are there any substitutions for the RAM chip in the
cart? I
Any 8kx8 SRAM can be used, like 5564 and 6264.
> can't find that one anywhere. What about recycled PC cache RAM from 486's?
If they are SRAM, no problems.
> Thanks!
>
> Ian Primus
> ian.primus@xxxxxxx
>
> Maximiliam Luppe wrote:
>
> > Hi, Sark.
> >
> > Take a look at
ftp://kew.sel.eesc.sc.usp.br/Electric/Atari2600/2600dev.zip
> >
> > I had another circuit that enables you to conect the 2600 directly to
the
> > parallel port, but I missed the schematic file. When I find the printed
> > file, I'll scan it and place it in the same site.
> >
> > Max
> >
> > -----Mensagem Original-----
> > De: "Sark" <ian.primus@xxxxxxx>
> > Para: <stella@xxxxxxxxxxx>
> > Enviada em: Sábado, 19 de Maio de 2001 00:13
> > Assunto: [stella] SRAM cart for 2600?
> >
> > > I know that somewhere out there in the "Information Wormhole" there
are
> > > schematics for building Atari 2600 SRAM carts and a reader/writer that
> > > connects to the PC's paralell port. Does anyone have these? Is there a
> > > web site somewhere with instructions on costructing such devices? If
> > > anyone can help, I would much appreciate it.
> > >
> > > Ian Primus
> > > ian.primus@xxxxxxx
> > >
> > >
> > > -
-
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