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Subject: RE: [stella] Help (Timing problems?) From: Nicolás Olhaberry <nolh@xxxxxxxxxxxxx> Date: Wed, 4 Aug 1993 06:14:25 -0300 |
----- Original Message -----
From: Erik Mooney <erik@xxxxxxxxxx>
To: <stella@xxxxxxxxxxx>
Sent: Thursday, August 02, 2001 11:44 AM
Subject: Re: [stella] Help (Timing problems?)
> As long as everything adds up to 262, you can do whatever you want.
Typically
> between 200 and 220 of those lines will actually be visible on the TV
screen,
> depending on each particular TV.
OK.
> Also, don't confuse the VBLANK hardware register with the VBLANK time
period.
> (These could have been better named.) The register means to disable all
TIA
> output. It's usually turned on at the start of the overscan area. The
time period
> is the scanlines between the end of VSYNC and the start of the game
display.
I see. I thought that it was necessary to use the VBLANK register if you
want the
VBLANK period to occur.
> No game should be able to use less than 3 lines of VSYNC. Could you post
the
> relevant code?
Oops... I was wrong with Alien, instead of 22 cpu cycles it uses 188, which
is 2 lines and a some cycles more. This is okay with the stella programmer´s
guide recommendations (" ...This is accomplished by writing a "1" in D1 of
VSYNC to turn it on, count at least 2 scan lines, then write a "0" to D1 of
VSYNC to turn it off...").
But "Math Grand Prix" uses just 149, slightly less than two lines (152)...
guess this is okay too. Unfortunately my 2600 doesn´t work, I would be
interesting to find the minimum amount of cycles for a valid VSYNC.
Here´s the source code for "Math Grand Prix", if anyone wants to take a
look. I tested it before pressing reset or select, since the game doesn´t
have an attract mode, every frame has the same value for $C3, which is the
only thing that affects the branch.
Blame outlook if the code looks all screwed up, really I don´t know how to
solve it without a text attachment.
104A LDA #$02
104C STA HMCLR
104E STA WSYNC
1050 STA VBLANK
1052 STA VSYNC ; 0 These numbers are the amount of cpu
cycles which has passed since the start of VSYNC period.
1054 TAY ; 2
1055 LDX $C3 ; 5
1057 LDA $1F64,X ; 9 The value loaded into A is $44.
105A SEC ; 11
105B INY ; 13
105C SBC #$0F ; 15
105E BCS $105B ; 45 Branch taken 4 times, so
((2+2+3)*4)+2=30
cycles passed.
1060 STA WSYNC ; 70 76 - (3+3+45)=25 cycles passed.
1062 EOR #$FF ; 72
1064 SBC #$06 ; 74
1066 ASL A ; 76
1067 ASL A ; 78
1068 ASL A ; 80
1069 ASL A ; 82
106A STA $FB ; 85
106C LDX #$00 ; 87
106E STA WSYNC ; 146 76 - (87-70)=59 cycles passed.
1070 STX VSYNC ; 149
Bye,
Nicolás.
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