[stella] TIA latch timing

Subject: [stella] TIA latch timing
From: "Eric Ball/Markham/IBM" <eball@xxxxxxxxxx>
Date: Tue, 16 Oct 2001 13:12:07 -0400

Is there a list somewhere which indicates the number of cycles after WSYNC
when each TIA register is latched?  e.g. I believe the playfield registers
are latched on color cycles 68 and 148 (left edge and middle of screen), so
any updates to those registers need to be completed by CPU cycle 22 and 49.
Also, are any registers not latched, so can only be updated during
HSYNC/VSYNC/VBLANK?



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Current Thread
[stella] TIA latch timing Eric Ball/Markham/IBM - Tue, 16 Oct 2001 13:24:39 -0400 (EDT) <= B. Watson - Tue, 16 Oct 2001 15:58:00 -0400 (EDT) Kevin Horton - Wed, 17 Oct 2001 00:28:22 -0400 (EDT) B. Watson - Wed, 17 Oct 2001 10:45:26 -0400 (EDT) <Possible follow-ups> Glenn Saunders - Tue, 16 Oct 2001 14:58:38 -0400 (EDT)

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