I think people are pretty casual about top-posting esp. w/ email.
Re: why no technical document, they get brief coverage in the Stella
guide...not very specific in terms of expected read times etc.. Maybe
they only had the plans and not the actual hardware to work against,
maybe there's more dcumentation that didn't make it out into the wild,
or maybe they're just lazy...
On 5/18/05, Charles R. Bond <cbond@xxxxxxxxxxxxx> wrote:
>
> (Excuse the top posting)
>
> Thanks for the tips from you and others. It still seems strange that there isn't a
> consolidated technical document dealing with the paddles. It's OK to 'search the archives'
> or 'examine the schematics' for specifics, but you'd think that Atari would have published a
> programmer's resource with more info...
>
> Anyway, I did find that (according the AtariAge schematic) the paddles use 1meg pots.
> On the other hand, I found another source which said they were 500k linear taper pots.
> Apparently the caps are .068microfarad and are on the board with the chips. These
> values are consistent with delay times from less than one scanline to somewhat more than
> one frame -- as has been stated.
>
> Regards,
>
> C. Bond
>
> -----Original Message-----
> From: Eric Ball <ericball@xxxxxxxxxxxx>
> Sent: May 17, 2005 7:49 PM
> To: stella@xxxxxxxxxxxxxxxxxx
> Subject: Re: [stella] Paddle controller docs?
>
> I recently did some proof-of-concept code for paddles on the 7800 (which
> uses a normal TIA to interface with the paddles), so it's fairly fresh in my
> mind.
>
> From: "C. Bond"
>
> > 1) Is there a schematic of the electrical circuit for the
> > paddles, including component values?
>
> Check the schematics on AtariAge (under 2600 archives).
>
> > 2) What is the approximate minimum and maximum delay times
> > from the start of charge to the activation of INPT0? (or
> > INPT1, INPT2, etc.)
>
> minimum is instant, maximum is more than 1/60th of a second (probably more
> than 1/50th), but I don't think it's much more.
>
> > 3) What is the best way to interrogate the paddles?
>
> discarge the cap during VSYNC, clamp it near the start of your kernel, count
> scan lines in the kernel
>
> kernel code kinda like this
> STA WSYNC ; synchronize to start of line
> LDA INPT0
> BIT INPT1
> BMI DLIP1
> INC OUTP1
> DLIP1 ASL
> BCS DLIP0
> INC OUTP0
> DLIP0 LDA DLI_A ; restore A register
>
> Although this is from a 7800 where cycle counting isn't necessary since you
> can't update registers while the screen is being drawn. 2600 code should
> implement standard equal path tricks.
>
> Note: you don't have to sample INPTx every line, that just gives you the
> greatest resolution. A 2LK could sample every other line and get 120
> positions instead of 240.
>
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