-----Original Message-----
From: Adam Wozniak <adam@xxxxxxxxxxxxxxxx>
Sent: Jun 13, 2005 9:40 AM
To: stella@xxxxxxxxxxxxxxxxxx
Subject: Re: [stella] Inside the TIA
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On Sun, 12 Jun 2005, C. Bond wrote:
> I am preparing a rather lengthy document covering the inner
> workings of the TIA in (excruciating) detail. It includes
> schematic diagrams, circuit analyses and comprehensive
> timing diagrams for critical signals inside the chip.
>
> Some excerpts from the document are posted at
> http://www.crbond.com/tia.htm and I would appreciate any
> comments from members of this forum.
What tools are you using for your simulations? What hardware
description language are you using? Do you have any plans
to open source your hardware description?
I wrote the simulator myself. Currently I am finishing a rework to support macros,
including those defined on the schematics for D1, D2, D1R, DL, L, FF1, FF1, FF3, etc.
Those circuits are currently only supported by gate level descriptions, so the macros
will reduce the effort required to define a circuit.
The simulator also supports exporting signals from one run to another, and defining
time-dependent generators and switches. This makes to easy to run experiments on
parts of a subsystem.
When I'm satisfied that it is completely functional, if not entirely bug-free, I'll simply
release the source and executables to anyone who wants them -- including the display
program.
Thanks for your interest.
C. Bond
- --
adam@xxxxxxxxxxxxxxxx http://cuddlepuddle.org/~adam
KG6GZR http://cuddlepuddle.org/~adam/resume.html
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