; TIA (Stella) write-only registers
;
Vsync equ $00
Vblank equ $01
Wsync equ $02
Audc0 equ $15
Audc1 equ $16
Audf0 equ $17
Audf1 equ $18
Audv0 equ $19
Audv1 equ $1A
;
; RAM definitions
; Note: The system RAM maps in at 0080-00FF and also at 0180-01FF. It is
; used for variables and the system stack. The programmer must make sure
; the stack never grows so deep as to overwrite the variables.
;
RamStart equ $0080
RamEnd equ $00FF
StackBottom equ $00FF
StackTop equ $0080
;
; 6532 (RIOT) registers
;
Swcha equ $0280
Swacnt equ $0281
Swchb equ $0282
Swbcnt equ $0283
Intim equ $0284
Tim64t equ $0296
;
; ROM definitions
;
RomStart equ $F000
RomEnd equ $FFFF
IntVectors equ $FFFA
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ORG $80
NoisePTR DS 2
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ORG $F000
Noisedata:
;
; insert sample data here!!!
;
; output frequency:
; 262 lines * 60 frames / one sample every fourth frame = 3930
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; Program initialization
;
ORG $FF00
Cart_Init:
SEI ; Disable interrupts.:
CLD ; Clear "decimal" mode.
LDX #$FF
TXS ; Clear the stack
Common_Init:
LDX #$28 ; Clear the TIA registers ($04-$2C)
LDA #$00
TIAClear:
STA $04,X
DEX
BPL TIAClear ; loop exits with X=$FF
LDX #$FF
RAMClear:
STA $00,X ; Clear the RAM ($FF-$80)
DEX
BMI RAMClear ; loop exits with X=$7F
LDX #$FF
TXS ; Reset the stack
IOClear:
STA Swbcnt ; console I/O always set to INPUT
STA Swacnt ; set controller I/O to INPUT
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
NewScreen:
LDA #$00
STA AudC0 ; set output allways high
STA AudF0 ; no frquency division
LDA #$02
STA Wsync ; Wait for horizontal sync
STA Vblank ; Turn on Vblank
STA Vsync ; Turn on Vsync
STA Wsync ; Leave Vsync on for 3 lines
STA Wsync
STA Wsync
LDA #$00
STA Vsync ; Turn Vsync off
LDA #$f0 ; set pointer to data
STA NoisePTR+1
LDA #$00
STA NoisePTR
STA Wsync
LDY #$00
OutVoice: LDA (NoisePTR),Y ;get high nibble
AND #$f0
LSR
LSR
LSR
LSR
STA Wsync
STA Wsync
STA Wsync
STA Wsync
STA AudV0 ; put out on volume
LDA (NoisePTR),Y ; get low nibble
AND #$0f
STA Wsync
STA Wsync
STA Wsync
STA Wsync
STA AudV0 ; put out on volume
INY
BEQ IncPTR
JMP OutVoice
IncPTR INC NoisePTR+1
LDA NoisePTR+1
CMP #$ff ; end of data?
BNE Loop
LDA #$f0 ; then reset pointer
STA NoisePTR+1
Loop JMP OutVoice
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; Set up the 6502 interrupt vector table
;
ORG IntVectors
NMI dw Cart_Init
Reset dw Cart_Init
IRQ dw Cart_Init
END
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