As we know, the 6507 address space between 297h (T1024T) and 1000h is
unused on the 2600. The cartridge address space is supposed to be 4k, but
all 13 address lines do connect to the cart slot, so the entire 8k could be
addressed on the cart.
Suppose one used a 2764 8K EPROM, with the chip enable tied to a logical OR
of A11 and A12 (and inverted if necessary - I think it would be), and the
EPROM's 13 address lines simply connected to the cart slot's 13 address
lines. Would this allow access to ROM data between addresses 0800h and
0FFFh, reclaming 2k of address space and allowing 6k carts with no
bankswitching?
The only problem I can see is if the TIA only checks address lines 0-5
(address), 7 (select between Stella and RIOT) and 12 and ignores the others
- meaning it would respond to writes to addresses $00 - $2C (the highest
register - CXCLR), and map to the registers any writes to $40 - $6C, $100 -
$12C, $140 - $16C, ... , $800 - $82C, $840 - $86C, etc.
Even in this case, it might be feasible to map a 4k RAM chip on the cart
between $000 and $FFF (chip enable A12), and only use addresses $30 - $3F,
$70 - $7F, $130 - $13F, etc. Stella shouldn't respond to those addresses,
so no conflicts would happen. This would provide an extra 512 bytes of
RAM, or 256 bytes if separate read-write addresses must be used like on
Superchip and other programs with cart-based RAM. One definite advantage
of this is it can be done to an existing board, recycled with a new
EPROM... it doesn't affect the function of the EPROM, and it involves
adding nothing but the RAM chip (no bankswitching hardware.)
Even if I'm completely wrong about all of this, is there any way to reclaim
any of the lower 4k address space and direct it into the cart slot?
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