>> > All the dicussions of the Supercharger have been good so far, but what
happens here:
>> >
>> > F000 ldx #$3f
>> > F002 cmp $f000,x ;Write data = $3f
>> > F005 NOP
>> > F006 lda $ff7b ;Write $3f to $f7b
>> >
>> > Wouldn't the SC see the opcode fetch from address F002 as Write data =
$02 and the start of a ram write?
>>
>> Humm... good question.. I'd say it works like this:
>>
>> cycle action
>> 0 load opcode for ldx from location f000
>> write value is set to 00 (since we are accessing f000)
>> 1 load operand from f001 (3f)
>>
>> 2 load opcode from f002 for cmp
>> 3 load low byte 00 from f003
>> 4 load high byte f0 from f004, add x to low byte
>> 5 load operand from f03f
>>
>> 6 load opcode from f005 for nop
>> 7 do something but nothing ...
>>
>> So I would say a poke(f03f,00) at cycle 5 or poke(f005,00) at cycle 6
>> occurs.
>
>I believe the piece of code I gave is a valid SC RAM write, I am assuming
that it will write $3F to $f7b. I am working under the assumption that RAM
writes work the same if the are executing in the $f000-$f0ff range as any
other location. I may be incorrect in this assumption.
>
I have just tried it out with a little demo program. The values were a little
different, but the code was located at $F000 also. What the program did was
poke(F03F,04). When I moved the code to $F001 it did poke(F03F,05).
In my code there was a RTS after the LDA $ff7b and the code was jumped to
with a JSR $F000/JSR $F001, if this helps understanding it's behaviour.
Ciao, Eckhard Stolberg
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