Re: [stella] Supercharger internals...

Subject: Re: [stella] Supercharger internals...
From: bwmott@xxxxxxxxxxxx
Date: Tue, 12 May 1998 21:52:20 -0400 (EDT)
> At 05:35 PM 5/7/98 -0400, you wrote:
> 
> My theory on the Supercharger hardware is that when the SC is
> write-enabled an access to page $f0 triggers a timer that sets the read/write
> line on the SC RAM to write for a short period of time while putting the
> low-byte of the address in an internal register.  It takes a couple of
> cycles for the read/write line to go high, and if an address is accessed
> within that period of time then the value is stored.  I believe there is a
> small window of 2 or 3 cycles for which the write would be enabled.  I used
> the sta instruction because it's more logical when reading the code.  I
> would guess that other instructions should work too, like inc, dec, eor,
> etc...

At one point this is the way I thought the Supercharger worked, however, 
after reviewing all of the cycle tables and the document that describes
what happens during each cycle of an instruction it seems to me that the 
only way for it to work is like this:

When the SC is write-enabled an access to page $f0 does the following:

  1) Stores the low byte of the address in an internal register

  2) Enables an "access" counter that counts the number of distinct
     memory locations accessed

  3) When the counter reaches 5(*) the contents of the internal register 
     are written into the memory location currently be accessed 

  (*) This value can be adjusted some how using the write-pulse delay

I'm hoping I'll get sometime to test this out on a real supercharger and
to try and figure out how the write-pulse delay works in the next week
or so...  

Does anyone know if this makes sense from a hardware point of view?  I 
mean are the address lines on the 6502 stable enough from one cycle to 
the next to count memory accesses from the cartridge?

> Great work btw!  When can we download the new version?

Well, it'll probably be another month or so before anything is ready
for release.  However, if you have access to Unix or Linux and would
like to be a beta tester let me know.

Brad 

--------------------------------------------------------------------------
Bradford W. Mott (bwmott@xxxxxxx)          Computer Science Department
http://www4.ncsu.edu/~bwmott/www           North Carolina State University
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