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In message <000a01be6033$eeb39e20$1002000a@light>, john@xxxxxxxxxxx writes:
>
>I'm still fascinated by the differences we've seen between different
>machines. I keep wondering if the differences are caused by different
>TIA chips, or some other timing anomoly inside the machine. Maybe the
>clocking is slightly different, maybe skewed on one machine but not the
>other. I wonder if anybody knows if there was really more than one
>version of TIA chip? Or if maybe it's just because certain aspects of
>the machine timing were "cleaned up" on later versions of VCS, like the
>JR and 7800?
I don't know about the TIA, but the clocks are different. Enough so
that the clock may die on at least one version (I can't remember which).
Bascially what I was doing was triggering my logic analyzer off of the
clock. Just that little bit of added RC loading (C=10pF, R=10M) was
enough to skew the clock beyond use. And if I remember right, I tried
buffering the clock with a 74HC04, and just the loading from one CMOS
inverter killed it in similar ways. And the clock skew was enough to
prevent what I was trying to do anyway....
So yeah, I think the clocks could be flaky in some boards. Note that
I mean *individual* boards, not all boards of a particular revision....
-Chris
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