Re: [stella] RAM usage

Subject: Re: [stella] RAM usage
From: Mark De Smet <de-smet@xxxxxxxxxxxxxxx>
Date: Tue, 20 Jun 2000 23:04:47 -0500 (CDT)
> At 09:45 PM 6/20/2000 -0400, you wrote:
> >No.  The 128 bytes of RAM are in addition to the register space.

This is correct.  The TIA registers are mapped into 128 bytes of space,
but a different 128 than the ram.

> Where is this memory stored then, inside the TIA?

The 128 bytes of memory is in the PIA.  The PIA contains the 128 byes of
memory, the timer, 2  8-bit input/output ports(all configureable in/out,
but the 2600 circuit board requires some to be input to prevent
contention), and interrupt logic.(which is not used)

> Also, isn't the 128 bytes considered the 6507's page zero as well?

I figured out the entire memory map a while ago, and could do it all up
again if you need it.  There are several 'images' of things in the 2600
architecture.  An image is when the actual piece of hardware(memory, or
TIA register) can be accessed from different addresses.  The images where
done do reduce hardware(address decoding logic), and to allow the neat
trick with the ram being zero page(for faster access), and also 1 page(for
stack, which has to be on 1 page).  So yes, the ram is BOTH at $80-FF and
$180-$1FF.  It is the same memory though, so $90 is the same memory byte
as $190.  There are more mirrors, which I can look up if you want.

> >No and no.  From a programming standpoint (which you're unfamiliar
> >with), the scanline ends immediately at the right border of the visible
> >area... the right overscan area is for all intents and purposes part of
> >the horizontal blank region for the next scanline.
> In the diagram from the Stella programmer's guide, the overscan is shown on 
> the left and not the right.

Yes, irrespective of the programmers view(which is very commonly shadded
over for programmers who don't understand hardware), the order is what is
important.  By scanline ends, what is important is that the WSYNC ends

>  From the perspective of the picture tube, however, are you saying that the 
> overscan overlaps from the right back to the left?

I'm fuzzy on this, but I think that the overscan does just that, keep
going right(if looked at from the front).  Then it turns around, and goes
left.  The stella manual doesn't mention this(or the hsync, color
burst) because it is not needed for programming, and it may unessecarily
confuse a programmer with little hardware background.

> How is the background color generated, BTW.  Doesn't this color beyond the 
> 160 pixels available to the playfield and sprites?

huh?  Sorry, I don't follow the question.  I think the answer may involve
the exact decodeing of the horizontal position counters, which we don't
know because we don't know what kinda of counter used(normal, LFSR, and if
LFSR, which version), nor do we know what the decoding was.

> There IS extra space on both the left and right edge.  How that works out 
> as far as the TIA is what I'm curious about.

I am not sure, but assume that the hardware imposed horizontal blank
simply ends and starts at those points.  The points were probably choosen
to allow majority of tv's to show all graphics.  I know that I have tv's
that cut a bit more of the left and right picture edges than other tv's

> If the beam starts to retrace at cycle 76 then how can the background color 
> continue on to the right?

I don't think the beam starts to retrace at 76.  That is where the TIA
lets the processor out of halt(end of WSYNC).  I don't know if the
backgroud color is drawn past this point, but if it is I would be
surprised because it would make sense for the hardware to start the hblank
at that time.  Remember that the blank includes the overscan, sync, and


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