Re: [stella] Asymmetrical Reflected Playfield

Subject: Re: [stella] Asymmetrical Reflected Playfield
From: Glenn Saunders <cybpunks2@xxxxxxxxxxxxx>
Date: Fri, 21 Sep 2001 09:13:44 -0700
At 09:44 AM 9/21/2001 +0200, you wrote:
2. You have to count the additional code arround your PF-writes too. The maximum cylce count for this is 27 (19 before, 8 after the PF-writes).

We need to label the timings here...

        DEC ScanLine
        BNE ScanLoop = max 8 cycles?

        DEC ScanPix             ;next screen pixel line
        BNE ScanGo
        LDA #5
        STA ScanPix
        DEX                     ;next big pixel line
        BNE ScanGo
        LDX #6

= max 19 cycles? I didn't think this would take that long.

- Put the 3 nops directly behind WSYNC and join those free cycles with the other free cycles before WSYN to gain more flexiblity here.

I thought about moving WSYNC to the physical end of the scanline code and doing something like that, but that could potentially screw up the PF2 rewrite.

For the purposes of this particular kernel, technically, everything works, but it would need major modification for Death Derby so I'm not too concerned right now about the code surrounding the PF writes because it's going to change.

I'm also assuming (and someone tell me if it's not possible) that I can just zero out the playfield registers every other scanline and still have enough time to load up all 4 sprite registers, using VDEL if necessary to align a sprite on a playfield scanline. We're talking double-scanline res here.

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