That seems reasonable. Though strictly speaking you should always cover
all your input possibilities. I.e. with "else" clauses in "if" statements
and "others" in "case" statements, etc. I think processes (doesn't your
"if" statement have to be inside a process?) imply flops, so you might get
away with it in this case, but it's mildly deprecated.
This is just a D-Latch. (thus the "L" designation). Depending on which
design software you're using, adding a signal "d" in your code might use
extra hardware when compiled. You can get the same functionality with
if p1 = '1' then
p3 <= p5;
else p3 <= p3;
end if;
p4 <= not p5;
BTW, this might use extra hardware too. You'll have to check your
compiler. It shouldn't but Cypress software (Warp) had a bug that
did it, and it seems like Xilinx (WebPack) did too.
Compilers are evil! Down with compilers! I want absolute power!
Give me ASSEMBLY LANGUAGE!!!!!!!!!!
Ahem.
If your software allows schematic capture, the best thing to do would be
to find the D-latch primitive and use it (with an external inverter if it
doesn't provide both outputs). If you really really want an all VHDL
design, you can then compile your single D-latch schematic into VHDL
and steal the code from yourself, for yourself. :)
-Chris
On Wed, 27 Oct 2004, Adam Wozniak wrote:
> -----BEGIN PGP SIGNED MESSAGE-----
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>
> I feel dump for asking, but I want to make sure I get this right.
>
> Can someone who knows VHDL and understands the TIA schematic give
> me a thumbs up or a thumbs down on my implementation of a component?
>
> Look here:
> http://cuddlepuddle.org/~adam/tia_in/data/component.cgi?boxl
> (there's a picture and some VHDL)
>
> - --
> adam@xxxxxxxxxxxxxxxx http://cuddlepuddle.org/~adam
> KG6GZR http://cuddlepuddle.org/~adam/resume.html
>
> "Did he get the girl? Oh, yeah. Why do you think he is drinking?"
>
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