>I don't agree on that. Look at the timing diagram for an LDA $FFF8:
>
> # address R/W description
> --- ------- --- ------------------------------------------
> 1 PC R fetch opcode, increment PC
> 2 PC R fetch low byte of address, increment PC
> 3 PC R fetch high byte of address, increment PC
> 4 address R read from effective address
>
>When the LDA $FFF8 is executed, you only have the effective adress
>on the bus for one processor cycle. So If the bankswitching hardware does
>not switch, if it sees a valid adress for one cycle, it will simply not
>work
>at all :-)
>
>And the 0.1 5F Cap is good for about 3005s delay. I think I calculated that
>a while ago.
>Don't know the exact value, but it is in that range. It should switch !
I assume you mean 300 ns... But anyway, I didn't realize that it would
operate that fast with a cap. That short of a delay should allow a switch
to complete within a single cycle, so if true, I wonder if it would work in
a 16k scheme, where we could place something like this in every bank:
ORG $FFF5
Bank_0:
RTS
Bank_1:
RTS
Bank_2:
RTS
Bank_3:
RTS
Then to jump to a routine in a particular bank, just do the LDA/PHA thing,
then JMP Bank_X. If it works, it would really reduce the complexity of
writing a 16k (or larger) game. OK, so maybe I should wait for this to be
thoroughly tested before I get too excited.
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