>The two timer loops (one to wait for the end of Vblank, the other for
>Overscan), are like this:
>
>LF20C: LDA INTIM
> BNE LF20C
> STA WSYNC
>
>That is, there's not a STA WSYNC immediately before the start of the loop,
>but how could this matter..?
I meant before you store the value for overscan to Tim64T. For a 30 lines
delay you would have to store 35.625 in the timer. The 0.625 equal 40 cycles.
If the last line of the kernel is smaller than 36 cycles it would add up
to the timer and you would be doing 30 lines instead of 31.
But since you said, that the last lines of kernel are all STA Wsync only,
that can't be the problem either.
I didn't notice if the colour is lost when you do a flashing effect, because
flashing screens and short loss of colour don't make that much difference.
Maybe you need to take the flashing out in order to find out about this.
Ciao, Eckhard Stolberg
--
Archives updated once/day at http://www.biglist.com/lists/stella/archives/
Unsubscribing and other info at http://www.biglist.com/lists/stella/stella.html
