## Re: [stella] why -68?

 Subject: Re: [stella] why -68? From: "John Saeger" Date: Tue, 6 Nov 2001 08:49:41 -0800
```You should thank Eckhard too.  He's been doing most of the work for the last
couple of years.

In any case, we start counting TIA cycles at -68 because that's how PCAE
does it.  We wanted to make it easy to compare results between z26 and PCAE.
When working on an emu, it's very handy to be able to compare with other
ones.  But this way TIA starts drawing at cycle 0.

Yes there are 228 cycles per scanline.  160 - (-68) = 228.  But the last
cycle you'll ever see is 157.  160 would put it at the beginning of the next
scanline.  At least that's what I think it should do.  Funny, even to this
day we're still having discussions about where a scanline should end and the
next one should begin.  It has to do with the worm war demo that was posted
a while back.  In z26 1.51 it doesn't jitter any more.  Some of us think it
should still be jittering, and some of us aren't so sure.  Stay tuned.

And TIA clock = 3*CPU clock.  228 = 3*76.

John

----- Original Message -----
From: "ben" <ben@xxxxxxxx>

> z26 is awesome btw  :)  Thanks John
>
> Anyways, I have a question regarding its cycle output.  Why does the TIA
> clock start at -68 and occupy 236 clocks (-68 to 157)?  isnt it supposed
to
> be 228?
>
> (  0   2   0 -68) ( 97  97  96  96  96) nvbdIzc 00 60 00 fd  f5c2: d0 fb
> bne  f5bf
> ....
> (  0   2  75 157) ( 97  97  96  96  96) nvbdIzc 00 68 00 fd  f5bf: e8
> inx
> ....
> etc
> ....
>
> Does this mean that the TIA clock is different to the 6502?  I am using
> 3584160/3 Hz (228*262*60/3) for the CPU, which gives 76 cycles per
> scanline.  What should the TIA clock be?  (236*262*60) 3709920Hz?
>
> cheers
>
> Ben
>
>
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