I recently did some proof-of-concept code for paddles on the 7800 (which
uses a normal TIA to interface with the paddles), so it's fairly fresh in my
mind.
From: "C. Bond"
> 1) Is there a schematic of the electrical circuit for the
> paddles, including component values?
Check the schematics on AtariAge (under 2600 archives).
> 2) What is the approximate minimum and maximum delay times
> from the start of charge to the activation of INPT0? (or
> INPT1, INPT2, etc.)
minimum is instant, maximum is more than 1/60th of a second (probably more
than 1/50th), but I don't think it's much more.
> 3) What is the best way to interrogate the paddles?
discarge the cap during VSYNC, clamp it near the start of your kernel, count
scan lines in the kernel
kernel code kinda like this
STA WSYNC ; synchronize to start of line
LDA INPT0
BIT INPT1
BMI DLIP1
INC OUTP1
DLIP1 ASL
BCS DLIP0
INC OUTP0
DLIP0 LDA DLI_A ; restore A register
Although this is from a 7800 where cycle counting isn't necessary since you
can't update registers while the screen is being drawn. 2600 code should
implement standard equal path tricks.
Note: you don't have to sample INPTx every line, that just gives you the
greatest resolution. A 2LK could sample every other line and get 120
positions instead of 240.
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