On Mon, 12 Jul 1999, John Saeger wrote:
> Well, back in the old days, when printed circuit boards were designed
...with balin whar and twobuhfours. Oak mindya...if sumdeeduh said partical
bard, theyduhbeen laughed outta town! Yesiree!
Sorry...I couldn't resist. :P
> with mylar, tape and an X-acto knife, one usually worked with a large
> piece of mylar, 2-4 times the real size and had the design photo-reduced
> using a precision lithography camera. There are probably some printed
> circuit houses that still have the equipment to do it in your area.
> Getting the size down to something scannable probably isn't that
> expensive. Much easier than trying to do it yourself in segments.
Is this a *plot* or a *mask*? When a person says "plot", I think X-Y plotter
on paper...used to look at the <WIDGET> design. When they say "mask", I think
about optical film used to actually make the <WIDGET>.
I agree with John. If you have an actual mask, then reducing it would be
next to trivial. But (assuming that this is the complete chip in one
picture) I tend to believe that this is a plot because one would need a
mask for each separate layer in the design.
-Chris
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