Personally I find it rather odd the read/modify/write of VSYNCH and WSYNC)
I'd just set or clear the bit with a direct write, myself.
It's never actually occurred to me during my programming, but are the
hardware registers (VSYNCH, WSYNCH, etc. reliably readable)? I would have
expected to have used shadow registers in RAM and always write the shadow
values to the HW regs when modifying regs.
eg:
VSYNCH = ( shadowVSYNCH |= BIT1 );
VBLANK = ( shadowVBLANK &= ~BIT1 );
Of course, direct writes of absolute values are OK. I'm just talking about
where you are masking out and in particular bits, where I thought I'd just
flag something that should be looked at carefully.
Cheers
A
-
Andrew Davie - adavie@xxxxxxxxxxx
TwoHeaded Software - www.2headed.com
----- Original Message -----
From: "Adam Wozniak" <adam@xxxxxxxxxxxxxxxx>
To: <stella@xxxxxxxxxxx>
Sent: Thursday, March 21, 2002 4:24 AM
Subject: Re: [stella] Dumb newbee question
> Ok, so this would be more correct?
>
> while (1)
> {
> // turn everything the same color
> COLUP0 = COLUP1 = COLUPF = COLUBK = i++;
>
> // 3 lines vsync
> VSYNC |= 0x02;
> for (j = 0; j < 3; j++)
> WSYNC=1; // wait for sync
> VSYNC &= ~0x02;
>
> // 37 lines vertical blank
> VBLANK |= 0x02;
> for (j = 0; j < 37; j++)
> WSYNC=1; // wait for sync
> VBLANK &= ~0x02;
>
> // visible screen
> for (j = 0; j < 192; j++)
> WSYNC=1; // wait for sync
>
> // overscan area
> for (j = 0; j < 30; j++)
> WSYNC=1; // wait for sync
> }
>
>
> On Wed, 20 Mar 2002, Thomas Jentzsch wrote:
> > The typical 2600 NTSC screen consists out of 4 parts:
> > 1. vertical sync: 3 lines (or more)
> > 2. vertical blank area: 37 lines (that one is missing)
> > 3. visisble screen: 192 lines
> > 4. overscan: 30 lines
> > ----------------------
> > total: 262 lines
>
> --
> adam@xxxxxxxxxxxxxxxx http://cuddlepuddle.org/~adam/pgp.txt
>
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