On Sun, 15 Dec 2002, Dan Boris wrote:
> This was posted to the list a couple days ago:
>
> Not quite. ;-) In FE bankswitching A13 is used to identify the
> two banks. Since this line isn't brought out of the 6507, the
> FE bankswitching logic waits for two consecutive accesses to
> this stack. Only JSR/RTS (and BRK/RTI) can do that. At the second
> access the high byte of the return address is either pushed onto
> or pulled from the stack. This is where the bankswitching logic
> finds out which bank need to be mapped in.
I'm running out of pins on my microcontroller. I've got all the
address lines, but do I really need to monitor ALL the data lines?
For FE, watching line D5 during the second access is sufficient?
i.e. I do not need to worry about D0-4 and D6-7 ?
Also, for 3F bank switching, is watching D0-1 sufficient?
Are there any other schemes where the banking logic needs to watch
the data lines?
--
Will code for food. http://cuddlepuddle.org/~adam/resume.html
adam@xxxxxxxxxxxxxxxx http://cuddlepuddle.org/~adam/pgp.html
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