Subject: Re: [stella] FE, 3F, Bankswitching, and Data lines From: "Matthias Hartl" <maze@xxxxxxxxxxxxxx> Date: Wed, 18 Dec 2002 12:41:38 +0100 |
> While I was making my cart, I put a frequency counter on A12 and got about a > 1Mhz for access. I now this isnt the best way to do it, but it was enough for > me to realize that there was no way my microcontroller was going to be able to > make it. Remember that some microcontrollers take multiple clock cycles per > instruction. I was running at 20MHz but, at 4 cycles per instruction I was > really at 5MHz. Thats at best 5 instructions per cart read! Not enough time > for me. I looked into CPLDs. I have always been afraid of them, but after a > little research they are a piece of cake to use. Look into Xilix XC9500 > series. The design software is free and I found a tutorial at http://www.al- > williams.com/pbx84.htm. I even ended up buying the al williams development > board and programmer (which is incredibly cheap compared to anything else I > could find). Their programmer works with the Xilix software. If I can figure > it out, anyone can. I don't think you really need a full blown FPGA like the mentioned Xilinx XC9500 to do bank-switch emulation in hardware. Some of the simple schemes (F6, F8, FA) can easily be implemented using a cheap Programmable Gate Array like a PAL20V16. I haven't tried though, but you can try yourself. Get yourself some VHDL compiler and select a PAL20V16 or GAL20V16 as target architecture and check if your code can be synthesized in one of these. Shouldn't be too hard. With kind regards, Matthias ---------------------------------------------------------------------------------------------- Archives (includes files) at http://www.biglist.com/lists/stella/archives/ Unsub & more at http://www.biglist.com/lists/stella/
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