Re: [stella] FE, 3F, Bankswitching, and Data lines

Subject: Re: [stella] FE, 3F, Bankswitching, and Data lines
From: Maximiliam Luppe <maxluppe@xxxxxxxxxxxx>
Date: Fri, 20 Dec 2002 18:25:53 -0200
> But all my post fit simulations show no delay.  I figured that since the 
> simulator has picosecond resolution that it would show something, nope.  I 
> even setup some circuits that were a cascade of gates from multiple inputs,
> and there was no way to optimize the gates out, but still the same, magically
> all gates switch the same time.  Unfortunately all I have to go on is the 
> simulator.  I dont have access to specialty tools to do circuit debugging to
> see if there is any real delay.  I only have a Shack multimeter.  I have
> asked Santa for many years for an osciliscope and a logic analyzer and
> others, but he never brings them (I must be bad), maybe this year.

What kind of simulator are you using? There are some simulators where you can 
choose real simulation (considering delays - also know timing simluation) or 
logical simulation (it considers only logical equations, without delays).


PS. Sorry about my poor English... :-)

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