Re: [stella] TIA question

Subject: Re: [stella] TIA question
From: Chris Wilkson <ecwilkso@xxxxxxx>
Date: Mon, 8 Sep 2003 23:36:10 -0400 (EDT)
NTSC color information is transmitted via a phase shift (delay).

The way this is done is to send a short reference "color burst"
during hblank and then delay the same signal during the scanline.
The amount of delay is set by the color.

In the TIA the delay is generated by augmented gate delays.  Think
of the effect of putting a resistor between 2 inverters and a capacitor
to ground on the input of the second inverter.  The color delay pin
(pin 10) sets the delay per stage by controlling the gate voltage of
the pullup devices in the inverter chain.  (Higher voltage -> more
gate drive -> more current into the capacitance of the next stage.)

The pot on the mother board sets the voltage at pin 10 and is used to
adjust the total possible phase delay to 360 degrees.


On Mon, 8 Sep 2003, Adam Wozniak wrote:

> What is the purpose of pin 10 (DEL) on the TIA?
> NTSC schematics link it to a 500Kohm POT labelled "Color Delay", which
> is also coupled to the 3.579545 MHz crystal.
> Does this provide some sort of phase shifted version of XTAL?  How
> would that be used?
> (I'm a more of a digital guy than an analog guy).
> --
> adam@xxxxxxxxxxxxxxxx
> Will code for food.
> "It seems I'm doomed to have .sigs which nobody can understand."
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