[stella] new bankswitching scheme ?

["Kroko" <Nil.Krokodil@xxxxxxx>]

 

I have finally finished my first flashcart prototype and I have a question to

the programming experts :-)

 

There is a bit of empty space on the CPLD. There are 128K SRAM on the Cartridge.

I would like this RAM to be available for programming. In theory I could enhance the

3F bankswitching to support RAM. We could call it 3F+. 128K/256 that would be 256

blocks of RAM each with a size of 512Bytes which would be mapped into the first 1K

of the cartridges address space. (512 bytes write port and 512 bytes read port). A write

to 3F selects a 2K Rom slice into the first 2K of the cartridge. A write to 3E could select

a 512Byte RAM slice into the first 1K of the cartridge. So the first 1K could be either

ROM or RAM, dependent on what address you were last writing to (3E or 3F). What do

you think about this idea ?

 

Would this RAM-Slice size be good, or should I make it smaller, lets say 256

slices of 256Byte ....

 

Kroko