Hi Fred,
> Also, it appears from the schematics that there is nothing that would
> cause
> syncing problems when asserting VBLANK at weird times. In fact it appears
> that we can call VBLANK any time we want, even in the middle of a
> scanline.
Also remember this syncing problem doesn't occur for the "late" VBLANK write
when the old VSYNC macro is used. Here it is just for reference.
; VERTICAL_SYNC
; Original author: Manuel Polik
; Inserts the code required for a proper 3 scannline
; vertical sync sequence
;
; Note: Alters the accumulator
;
; IN:
; OUT: A = 1
MAC VERTICAL_SYNC
LDA #$02 ; A = VSYNC enable
STA WSYNC ; Finish current line
STA VSYNC ; Start vertical sync
STA WSYNC ; 1st line vertical sync
STA WSYNC ; 2nd line vertical sync
LSR ; A = VSYNC disable
STA WSYNC ; 3rd line vertical sync
STA VSYNC ; Stop vertical sync
ENDM
Also know that I ran this on a 7800. I have not run this on a VCS so the
results may be different on a VCS. I *think* Aaron said some of is testing
was done on the VCS with the same results.
Take care,
Dennis
Archives (includes files) at http://www.biglist.com/lists/stella/archives/
Unsub & more at http://stella.biglist.com
