Re: [stella] Re: [Fpga2600] Where am I going wrong?

Subject: Re: [stella] Re: [Fpga2600] Where am I going wrong?
From: Chris Wilkson <ecwilkso@xxxxxxx>
Date: Fri, 3 Jun 2005 10:23:25 -0400
On Fri, 3 Jun 2005, Adam Wozniak wrote:

> Hash: SHA1
> On Fri, 3 Jun 2005, Chris Wilkson wrote:
> > You're using a DSO (digital sampling oscilloscope) and it looks like a
> > software frob so I don't know if it's real, but you have glitches during
> > your sync pulses.  That's a murder/death/kill right there.  A big one.
> Yeah, I saw those too, and am concerned.
> I'm still not sure if that's the bitscope being goofy, or if they're real.

The more I think about it, the more I think it's probably real.

> My DAC is an 8 bit r/2r ladder feeding a high speed op-amp in a unity
> gain configuration.  I used the op-amp because I wasn't sure what the
> exact load would be or what it would do to the output of the resistor
> ladder.
> I thought throwing s very small cap on the output of the resistor ladder
> might smooth out small glitches.  The nearest cap at hand was a .1uF, which
> of course is way too big. :)

The opamp is a good idea.  You should put a 75 Ohm resistor between the opamp
and the monitor for impedance matching.  When you do this of course, your video
will need to be 0-2V with no load so when you attach the 75 Ohm monitor (or TV)
the voltage will be 0-1V.  Adding a cap can help filter glitches, but probably
not in a meaningful way.  If a cap is big enough to fix glitches, it's going
to "smear" the image, making it blurry.  I think I'd avoid it in general.
Anyway, your glitch is happening during the hsync pulse, which means the
digital inputs to the D2A are glitching.  That's a logic problem.  :(

> Thanks for the advice re: voltage levels.  I've tried all kinds of numbers,
> I'll give yours a run next.

No problem.  BTW, those will be hard to achieve exactly with an 8-bit DAC unless
you modify the ladder to be non-linear.  But you can get "close enough" if you
make it so that 255 -> 1V.  You can then modify the numbers I gave by multiplying
IRE by 255/140 ~= 1.82.

IRE  ->  DAC
20   ->  37  (bottom of colorbust = 145mV)
40   ->  73  (blank = 286mV)
47.5 ->  87  (black = 341mV)
60   ->  110 (top of colorburst = 431mV)
100  ->  182 (bottom of brightest color = 714mV)
120  ->  218 (white = 855mV)
140  ->  255 (top of brightest color = 1V)

> I _have_ gotten a good b&w image for sometimes several minutes at a time.
> I suspect I've got other problems too though; sometimes it looks as if the
> processor is locking up (My next plan is to look at phi0 and rdy).

Are you modeling the processor too?  Or just the TIA?  One thing that can be helpful
is infinite recording.  Set your scope to store each signal with infinite persistence.
Then go do something else.  When you come back, you can find out where glitches are
happening and you can start to track down the causes.  Try that with PHI0 and RDY
to see if they are glitching (or dying altogether).

> My PF graphics look close to ok.  My P0/P1 graphics are jumping all over
> the place.  My M0/M1 graphics look close to ok.

LOL!  I know your pain...for the longest time one of my missiles was always offset
by 1 pixel from where it should have been, and the ball refused to go into the
left quarter of the screen.  :P

Keep banging on it're getting close!  :)


Archives (includes files) at
Unsub & more at

Current Thread