Re: [stella] Re: [Fpga2600] Where am I going wrong?

Subject: Re: [stella] Re: [Fpga2600] Where am I going wrong?
From: Adam Wozniak <adam@xxxxxxxxxxxxxxxx>
Date: Fri, 3 Jun 2005 08:45:09 -0400
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On Fri, 3 Jun 2005, Chris Wilkson wrote:
> You're using a DSO (digital sampling oscilloscope) and it looks like a
> software frob so I don't know if it's real, but you have glitches during
> your sync pulses.  That's a murder/death/kill right there.  A big one.

Yeah, I saw those too, and am concerned.

I'm still not sure if that's the bitscope being goofy, or if they're real.

My DAC is an 8 bit r/2r ladder feeding a high speed op-amp in a unity
gain configuration.  I used the op-amp because I wasn't sure what the
exact load would be or what it would do to the output of the resistor
ladder.

I thought throwing s very small cap on the output of the resistor ladder
might smooth out small glitches.  The nearest cap at hand was a .1uF, which
of course is way too big. :)

Thanks for the advice re: voltage levels.  I've tried all kinds of numbers,
I'll give yours a run next.

I _have_ gotten a good b&w image for sometimes several minutes at a time.
I suspect I've got other problems too though; sometimes it looks as if the
processor is locking up (My next plan is to look at phi0 and rdy).

My PF graphics look close to ok.  My P0/P1 graphics are jumping all over
the place.  My M0/M1 graphics look close to ok.

- -- 
adam@xxxxxxxxxxxxxxxx        http://cuddlepuddle.org/~adam
KG6GZR                       http://cuddlepuddle.org/~adam/resume.html


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