On Wed Jun 8 2:17 , Thomas Jentzsch <tjentzsch@xxxxxx> sent:
>I don't know how to read VHDL, but VDELBL works like VDELP0. Both are
>triggered by a write to GRP1. So with VDELBL, you only enable the
>ball's shadow register, which is copied into the visible register when you
>write to GRP1.
>
>Hope that made sense.
Just in case it doesn't make sense, here's an alternative explanation.
The point in the TIA manual about "delaying one line" is baloney. The
VDEL registers look for writes to GRPx; they don't monitor the scanline
counter.
When that was written, you were expected to write to GRP0 and GRP1
every other line during your kernel (as Combat does.) If you actually
do that, all three VDEL registers behave exactly as advertised (delaying
the object by one line). But if you're doing anything more complex with
the GRP registers, it completely skews the behavior of the VDEL mechanism.
- Erik
Archives (includes files) at http://www.biglist.com/lists/stella/archives/
Unsub & more at http://stella.biglist.com
