Re: [stella] 6502 hardware register writes

Subject: Re: [stella] 6502 hardware register writes
From: "Roger Williams" <mer02@xxxxxxxxxxxxx>
Date: Fri, 2 Nov 2001 20:40:29 -0800
>It's not just the frequency..... 18Mhz on a 8051 is wildly different to 
>18Mhz on an AVR Risc ..... 

18MHz on a 8051 is about the same as 1 MHz on a 6502.  Every
instruction takes TWELVE cycles.  And while the 8051 has some
very cool bitwise manipulation and conditional testing abilities, it
also doesn't have very powerful indirect addressing.  Think Stella
is weird?  If it had an 8051 here's some of the things we would
be dealing with:

Three, count 'em, completely separate banks of memory reached
by different instruction types.  "Expanded" and "Program" may
or may not be mapped to the same physical chips.  (If not, "program"
is read-only.)  You get 64K.  "RAM" is 256 bytes with a lot of

All the "Special Function Registers" are mapped to the upper
128 bytes of RAM.  If you do a DIRECT read or write, you
get these registers, which is how you set the upper and lower
bytes of X, the UART controls, timers, and other controls
and whatnot.  If you do an INDIRECT read or write using
one of the lower 32 bytes as an 8-bit index, you get more
RAM.  In the lower 128, direct and indirect addressing
access the same data.

The lowest 32 bytes of RAM form 4 banks of 8 8-bit
registers  There is a SFR (direct write to upper 128) which
sets which of the 4 banks is active and accessed by the
register-access instructions.  You can do math between
any lower 128 location and the accumulator, with register,
direct, or 8-bit indirect (via a register) addressing.

Two of the currently active registers form a 16-bit
bit addressible space, which can perform a full range
of logic manipulations and tests 1 bit at a time.  This
part of the chip is actually kewl.

Two of the SFR's are the upper and lower halves of the
X register.  The ONLY access to expanded RAM is 
to move something into or out of the accumulator with
a MOVX instruction which in turn is directly addressed
by the X register.  Mercifully there is a LDX# instruction
to set X all at once.  Unmercifully, while you can increment
X you can't decrement it.

Think those indirect accesses are a nuisance with their
5-or-6 clock cycle counts?  On the 8051, the equivalent

    ADC (Someplace),Y    ;6 cycles

requires almost two hundred cycles if (Someplace) contains
a 16-bit value.

Last year I did quite a bit of 8051 on a Blue Earth
Controller which I was fortunately able to port over to
an x86 box via a firmware hack.  Even at 12 MHz the
8051 was having trouble keeping up with a relatively.
modest data collection and control system 
18 MHz wouldn't be much better.

--Roger Williams

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