Re: [stella] Thomas Jentzsch's PAL -> NTSC Conversions

Subject: Re: [stella] Thomas Jentzsch's PAL -> NTSC Conversions
From: "Roger Williams" <mer02@xxxxxxxxxxxxx>
Date: Fri, 8 Feb 2002 15:29:31 -0800
From: Eckhard Stolberg <Eckhard_Stolberg@xxxxxx>

> Gas Hog is setting up a timer and keeps polling it constandly.
> Indy 500 also does that, and I had problems with this game
> too

This absolutely will not work with video hardware that times
from the end of VSYNC instead of the beginning.  There will
be variations in the timing which are not acceptable.  The point
of writing to WSYNC is that the end of the pulse is timed
exactly to within one cycle.  When you set up a loop you
get at least a 15-cycle, and sometimes more, variation in
the length of the pulse.

It should not matter if you do logic within the vertical sync,
but you must end it by writing WSYNC and waiting for the
TIA to wake up the CPU.  You don't even have to write
all three of them, if you *know* your logic will take at least
2 scan lines and never more than 3 less STA WSYNC.

Neither the NTSC nor PAL specification addresses
whether hardware should trigger from the leading or
trailing edge of VSYNC.  Hardware which triggers from
the leading edge will not care about sloppy trailing edge
timing.  Emulators too will vary in response depending on
how they trigger their background video timing.

--Roger Williams

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