Re: [stella] Critical CPU/TIA Timing

Subject: Re: [stella] Critical CPU/TIA Timing
From: "C. Bond" <cbond@xxxxxxxxxxxxx>
Date: Sat, 13 Sep 2003 19:44:55 -0700
Andrew Davie wrote:

> Session 18 of my Programming the 2600 Tutorials contain a detailed timing
> diagram for CPU writes to TIA for PF updates.  Here's the link to that
> session...
> Cheers

Thanks for the pointer. I concur with other posters at AtariAge that the timing chart is a great
contribution. So is the text of your tutorial.

Having said that, I think my question was aimed at the next level down in the hardware -- where
the CPU signals interact with the TIA. For example,  might I conclude from your timing diagram,
that if I execute a STA PF1 (3 CPU cycles) at CPU cycle 25, the output for PF1 will be properly
updated?  There has been a lot of discussion on this board and the AtariAge board about the
*specific* clock boundaries honored by the TIA, but so far only bits and pieces of the answer have
appeared (Brad's work on the HMOVE subtleties comes to mind.) That was why I posted a timing chart
showing the actual write timing of the CPU.

We do need tutorials and programmer's guides, but we also need detailed reference cards or
summaries which cover the boundary conditions. (That's probably asking too much, since most
gamers, programmers, engineers, etc. aren't crazy about documentation!)


Archives (includes files) at
Unsub & more at

Current Thread