Subject: Re: [stella] TIA video timing From: Chris Wilkson <ecwilkso@xxxxxxx> Date: Thu, 10 Mar 2005 17:19:56 -0500 |
On Thu, 10 Mar 2005, Adam Wozniak wrote: > -----BEGIN PGP SIGNED MESSAGE----- > Hash: SHA1 > > On Thu, 10 Mar 2005, Chris Wilkson wrote: > > > -- video sync output > > > process (posNOW) > > > begin > > > if posNOW = "00010000" then -- 00010000 == 16 > > > sync <= not ('1' xor regVSYNC); > > > elsif posNOW = "00100000" then -- 00100000 == 32 > > > sync <= not ('0' xor regVSYNC); > > > end if; > > > end process; > > > > > > Did I get the logic levels right? Ack, I still don't feel > > > like I'm on solid ground here. > > > > When regVSYNC is a one, you want the pin to be high during hsync > > and low otherwise. > > So you need to invert your counter logic: > > > > sync <= ('0' xor regVSYNC); -- turn on hsync > > sync <= ('1' xor regVSYNC); -- turn off hsync > > isn't > sync <= not ('1' xor regVSYNC); > equivalent to > sync <= ('0' xor regVSYNC); -- turn on hsync > ? Yep. Sorry...I misread your "xor" as a "xnor". My mistake. > method one... when regVSYNC = 0, sync = 0 > when regVSYNC = 1, sync = 1 > method two... when regVSYNC = 0, sync = 0 > when regVYSNC = 1, sync = 1 > > > Well color me silly. Doesn't this then become... > > > -- video sync output > process (posNOW) > begin > if posNOW = "00010000" then -- 00010000 == 16 > sync <= regVSYNC; > elsif posNOW = "00100000" then -- 00100000 == 32 > sync <= not regVSYNC; > end if; > end process; Yes, I think it does. -Chris Archives (includes files) at http://www.biglist.com/lists/stella/archives/ Unsub & more at http://stella.biglist.com
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