>
>
> You know what would be neat if difficult and complex? Bank-switching
> hardware that works by recognizing the 6502 opcodes as the processor retrieves
> them, and adjusting the mapping accordingly.
This would be neat, but for one, it would have to recognize the difference
between operators and other data, including operands.... it would also
have to work with something that isn't used normally, such as NOP or
STA/STX/STY to a non-zero-page address.
But most cartridges, I understand, use an instruction like LDA $FFF9
for bankswitching. What would the advantage be?
I can see one possible advantage: using STA to store an accumulator into
RAM, as opposed to weird LDA acrobatics. Actually, since the cartridge
still has no way to get the accumulator from the 6507, it'll probably
be a little different from a normal store operation, but still a little
more efficient and less accident-prone than, say, the Supercharger's
RAM. Perhaps you electronics wizards can elaborate on that.
But then, I've overlooked the obvious: detecting JMP, JSR, and RTS
instructions. Well, for simplicity's sake only JMP may be possible.
JSR and RTS are weird. Imagine being able to do this:
*= $1000
...
LDA #0
STA WSYNC
JMP $F999
*= $F999
LDA #255
STA WSYNC
...
Certainly easier than the alternative.
I can almost see it, or at least imagine it; I wouldn't know the
circuitry. But the magic chip would see the fetch to $FFF9, and
then the outgoing $4C. "Oh, heavens-to-Betsy! That looks like a
JMP!" it would say, in a cute little munchkin voice. Imagine its
delight when the next fetch at the next cycle comes into $1FFA.
"Oh goodness gracious! Two consecutive fetches in two consecutive
locations! This must be a JMP instruction! I'd better get ready
for the high byte!" It would then watch the next outgoing byte.
It's a $D0. The magic chip would wave its magic fairy want and
POOF! The chip would be in bank $D000, and not $F000. But the
magic chip must hurry, because JMP is only three cycles long, which
means the chip would have to make the switch BETWEEN CYCLES for it
to work smoothly.
If this magic chip existed, it would be the device I'd choose to
take back in time to 1981 to rejuvinate the 2600.
I'm also thinking of another magic chip, which catches LDA
instructions and allows the cartridge to fetch instructions from
one bank and data from another. That chip would switch the bank
for EXACTLY one cycle after the instruction was fetched, and then
back. If it works, and if this chip can recognize different
instructions, it could work with not only LDA Absolute, Absolute,X
and Absolute,Y, but also possibly AND and BIT instructions. A
samrt enough chip could adjust itself for the indirect modes
which use only two-byte instructions.
Here's a dumb idea for a magic chip, one that uses no ROM nor
RAM. Just one that does certain btiwise math for the user which
the 6507 might poke around on. In this chip would live a little
gnome, and when it sees an LDA $F***, it lets it go through like
normal, but when it sees an LDA $D0**,X, it takes the byte
represented by **, reverses the bit order, and sends it back
through the data lines in place of whatever was in the ROM.
Or it shifts it four bits over, so you don't have to waste
eight cycles with four ROL's. This could be a fun chip to use.
Perhaps a chip that automatically increments a pointer and
returns the contents, like the one in Pitfall II. Does David
Crane have the specs for his?
I suspect the costs would be prohibitive, though. You'd need some
really smart-ass circuitry to do any of this. I'd love to be
proven wrong, though.
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