> I can't imagine they designed it at the FET level, surely it must be
> a modular design ?
As I understand it, the primary design constraint was chip area.
Although these design tricks might not seem elegant when compared to
a "pure-gate" design, they are all part of the minimalist design criteria.
Most CS people would probably say that Stella software is ugly for the exact
reasons - very constrained design space, not-modular, etc. But it's also
elegant on another level, when you consider that you are stretching the
boundaries of what is possible. Doing the most with the least.
Wow, that was more metaphysical than I intended. :)
-Frank
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