Re: [stella] Reflex: Yeah! Skipdraw incorporated!

Subject: Re: [stella] Reflex: Yeah! Skipdraw incorporated!
From: David Galloway <davidgalloway@xxxxxxxxxxxxxx>
Date: Mon, 06 Sep 2004 01:44:23 -0700
Lee Fastenau wrote:

Almost... It works great in Z26, but the Supercharger hoses it slightly. It
smells of newbie error... like the old missing "#" or someat.

Weird. I had to change an "unconditional" BEQ to a JMP.

That got me curious to take a look. :-)
I diffed ver 75 and 76 and found the change you mentioned.

beq .enterHere    (changed to jmp .enterHere in 76)

If you build reflex75.asm with -lreflex75.lst (generate a listing file) then you can inspect what was generated for the SLEEP macro. (I've removed some of the macro syntax for clarity)

    12  f099               24 00              bit    VSYNC
    18  f09b               ea              nop
    18  f09c               ea              nop
    18  f09d               ea              nop
    18  f09e               ea              nop
    18  f09f               ea              nop
   382  f0a0               f0 0d              beq    .enterHere

So what you have is the reliance on bit VSYNC setting the Z bit in the flags. For a bit instruction, the Z flag is set as (Accumulator AND VSYNC) so I think what you have proven is that 'in the wild' or at least on a supercharger, reading VSYNC can return a non-zero value. You also have a non-zero value in A. So the result must clear the Z flag. It does seem to be a leap of faith to read from VSYNC, AND it with the accumulator and hope to get a zero result in this situation.

If you really wanted to save a byte I think you could cook up something in the 7 bytes that kills the 13 cycles and reliably sets the flags. For instance you could remove the bit VSYNC and replace it with a LDA zpage and then load from a known constant (or known non-zero) and do a bne...

- David

Anyway, new binary/source.


PS: What's up with the "SPAM-LOW?!"
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