>>Well, you can't use those two when the stack is pointing at one of the TIA
>>registers, as is done in some kernels. My usual compact delay is INC
>>zeropage - two bytes for five cycles.
>
>Trying to figure what advantage there is to pointing the stack at the TIA?
>Sure you get a single byte code-size write capability (at the cost of the
>stack pointer stave/restore, wrapping your accesses to the TIA, and an index
>register or variable to store the stack pointer).
>
>Sure, you can do your writes with a PHA (3 cycles, 1 byte)
>But... how does it improve on a STA register? (3 cycles, 2 bytes)
>You gotta be real short of space and do a lot of register writes for this to
>make an improvement... or am I missing something?
Well, I use it in a kernel to store the flags register into one of the TIA
registers with PHP. I can't think of any way for PHA to be preferable over
STA immediate, though, unless the code size is supremely important and
you're storing to a bunch of consecutive TIA addresses.
PLA might certainly be preferable over LDA, though. If for some reason you
need to make, say, 12 TIA writes from a variable place in ROM, copying
those 12 bytes into RAM offscreen and looping PLA/STA in the kernel is
faster than doing LDA indirect indexed/STA.
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